Damage-Free Back Channel Wet-Etch Process in Amorphous Indium–Zinc-Oxide Thin-Film Transistors Using a Carbon-Nanofilm Barrier Layer
2014-07-23T00:00:00Z (GMT) by
Amorphous indium–zinc-oxide thin film transistors (IZO-TFTs) with damage-free back channel wet-etch (BCE) process were investigated. A carbon (C) nanofilm was inserted into the interface between IZO layer and source/drain (S/D) electrodes as a barrier layer. Transmittance electron microscope images revealed that the 3 nm-thick C nanofilm exhibited a good corrosion resistance to a commonly used H<sub>3</sub>PO<sub>4</sub>-based etchant and could be easily eliminated. The TFT device with a 3 nm-thick C barrier layer showed a saturated field effect mobility of 14.4 cm<sup>2</sup> V<sup>–1</sup> s<sup>–1</sup>, a subthreshold swing of 0.21 V/decade, an on-to-off current ratio of 8.3 × 10<sup>10</sup>, and a threshold voltage of 2.0 V. The favorable electrical performance of this kind of IZO-TFTs was due to the protection of the inserted C to IZO layer in the back-channel-etch process. Moreover, the low contact resistance of the devices was proved to be due to the graphitization of the C nanofilms after annealing. In addition, the hysteresis and thermal stress testing confirmed that the usage of C barrier nanofilms is an effective method to fabricate the damage-free BCE-type devices with high reliability.