NEEK10 Kit Configuration
Pin Assignments:
Pin Assignment Table:
CLOCK
Name |
Location |
Direction |
Standard |
ADC_CLK_10 |
M9 |
input |
3.3-V LVTTL |
MAX10_CLK1_50 |
N5 |
input |
3.3-V LVTTL |
MAX10_CLK2_50 |
V9 |
input |
3.3-V LVTTL |
MAX10_CLK3_50 |
N14 |
input |
1.5 V |
KEY
Name |
Location |
Direction |
Standard |
KEY[0] |
T22 |
input |
1.5 V Schmitt Trigger |
KEY[1] |
U22 |
input |
1.5 V Schmitt Trigger |
KEY[2] |
AA22 |
input |
1.5 V Schmitt Trigger |
KEY[3] |
AA21 |
input |
1.5 V Schmitt Trigger |
KEY[4] |
R22 |
input |
1.5 V Schmitt Trigger |
FPGA_RESET_n |
D9 |
input |
3.3-V LVTTL |
SW
Name |
Location |
Direction |
Standard |
SW[0] |
N22 |
input |
1.5 V |
SW[1] |
M22 |
input |
1.5 V |
SW[2] |
N21 |
input |
1.5 V |
SW[3] |
L22 |
input |
1.5 V |
SW[4] |
J22 |
input |
1.5 V |
SW[5] |
H22 |
input |
1.5 V |
SW[6] |
J21 |
input |
1.5 V |
SW[7] |
C21 |
input |
1.5 V |
SW[8] |
G19 |
input |
1.5 V |
SW[9] |
H21 |
input |
1.5 V |
LEDR
Name |
Location |
Direction |
Standard |
LEDR[0] |
C2 |
output |
3.3-V LVTTL |
LEDR[1] |
B3 |
output |
3.3-V LVTTL |
LEDR[2] |
A3 |
output |
3.3-V LVTTL |
LEDR[3] |
C3 |
output |
3.3-V LVTTL |
LEDR[4] |
A4 |
output |
3.3-V LVTTL |
LEDR[5] |
B4 |
output |
3.3-V LVTTL |
LEDR[6] |
C4 |
output |
3.3-V LVTTL |
LEDR[7] |
B5 |
output |
3.3-V LVTTL |
LEDR[8] |
C5 |
output |
3.3-V LVTTL |
LEDR[9] |
D5 |
output |
3.3-V LVTTL |
HEX
Name |
Location |
Direction |
Standard |
HEX0[0] |
D6 |
output |
3.3-V LVTTL |
HEX0[1] |
A5 |
output |
3.3-V LVTTL |
HEX0[2] |
C6 |
output |
3.3-V LVTTL |
HEX0[3] |
A6 |
output |
3.3-V LVTTL |
HEX0[4] |
F7 |
output |
3.3-V LVTTL |
HEX0[5] |
D7 |
output |
3.3-V LVTTL |
HEX0[6] |
B7 |
output |
3.3-V LVTTL |
HEX1[0] |
C7 |
output |
3.3-V LVTTL |
HEX1[1] |
C8 |
output |
3.3-V LVTTL |
HEX1[2] |
D8 |
output |
3.3-V LVTTL |
HEX1[3] |
D10 |
output |
3.3-V LVTTL |
HEX1[4] |
E10 |
output |
3.3-V LVTTL |
HEX1[5] |
H11 |
output |
3.3-V LVTTL |
HEX1[6] |
E6 |
output |
3.3-V LVTTL |
DAC
Name |
Location |
Direction |
Standard |
DAC_DATA |
A2 |
inout |
3.3-V LVTTL |
DAC_SCLK |
B1 |
output |
3.3-V LVTTL |
DAC_SYNC_n |
B2 |
output |
3.3-V LVTTL |
Power Monitor
Name |
Location |
Direction |
Standard |
PM_I2C_SCL |
E8 |
output |
3.3-V LVTTL |
PM_I2C_SDA |
E9 |
inout |
3.3-V LVTTL |
PS2
Name |
Location |
Direction |
Standard |
PS2_CLK |
V3 |
inout |
3.3-V LVTTL |
PS2_CLK2 |
U1 |
inout |
3.3-V LVTTL |
PS2_DAT |
P3 |
inout |
3.3-V LVTTL |
PS2_DAT2 |
R3 |
inout |
3.3-V LVTTL |
Uart to USB
Name |
Location |
Direction |
Standard |
UART_RESET_n |
D15 |
output |
2.5 V |
UART_RX |
E16 |
input |
2.5 V |
UART_TX |
E15 |
output |
2.5 V |