RO
Publications
- Neural-Network Decoders for Quantum Error Correction Using Surface Codes: A Space Exploration of the Hardware Cost-Performance Tradeoffs
- Cryogenic Comparator Characterization and Modeling for a Cryo-CMOS 7b 1-GSa/s SAR ADC
- Cryo-CMOS for Analog/Mixed-Signal Circuits and Systems
- A 1GS/s 6-to-8b 0.5mW/Qubit Cryo-CMOS SAR ADC for Quantum Computing in 40nm CMOS
- A 1-GS/s 6–8-b Cryo-CMOS SAR ADC for Quantum Computing
- Real-time decoding for fault-tolerant quantum computing: progress, challenges and outlook
- Cryogenic-Aware Forward Body Biasing in Bulk CMOS
- A Cryo-CMOS SAR ADC With FIA Sampling Driver Enabled by Cryogenic-Aware Back-Biasing
- A Benchmark of Cryo-CMOS 40-nm Embedded SRAM/DRAMs for Quantum Computing
- A Cryo-CMOS DAC-Based 40-Gb/s PAM4 Wireline Transmitter for Quantum Computing
- A Benchmark of Cryo-CMOS Embedded SRAM/DRAMs in 40-nm CMOS
- A Cryo-CMOS DAC-based 40 Gb/s PAM4 Wireline Transmitter for Quantum Computing Applications
- Real-time decoding for fault-tolerant quantum computing