Reduce Order Modeling of the modular multilevel DC/DC converter (M2DC) for HVDC grid

The Modular Multi-Level DC-DC Converter (M2DC) is an attractive non-isolated DC-DC converter topology for HVDC grid. In order to carry out MTDC grid stability studies, the development of reduce order models of converters is necessary. This article first presents the M2DC converter. Then, the reduce order model will be developed in the second part. The development of the control of this model will be carried out in the third part. Atlast, the comparison of the reduce order model and its control with the average arm model will be performed in the later section of the paper.

Abstract-The Modular Multi-Level DC-DC Converter (M2DC) is an attractive non-isolated DC-DC converter topology for HVDC grid.In order to carry out MTDC grid stability studies, the development of reduce order models of converters is necessary.This article first presents the M2DC converter.Then, the reduce order model will be developed in the second part.The development of the control of this model will be carried out in the third part.Atlast, the comparison of the reduce order model and its control with the average arm model will be performed in the later section of the paper.
The upper and lower arm are precised with the subscript "u" and "l".

P *
Reference power on low-voltage side Angle between v sAC and v dif f AC r, l Arm resistance and inductance r s , l s Line resistance and inductance W c Energy stored in the arm W ∆ c Difference of energy stored between the upper arm and the lower arm.

I. INTRODUCTION
Over the past two decades, many HVDC links have been commissioned and many more will be in the near future.Multi-Terminal DC (MTDC) grids have been proposed interconnecting these HVDC point-topoint links to increase their flexibility and robustness.However, existing HVDC system interconnections will require bi-directional DC-DC converters since voltage levels and grounding systems may vary between projects.However, the voltage levels in HVDC prohibit the use of conventional topologies, switching type.As presented in [1] to [5], major topologies for DC/DC converters in the high-voltage area are based on the Modular Multilevel Converter (MMC) architecture, thanks to its modular property, high efficiency and growing technological maturity.Among these different proposals, the MMC Dual Active Bridge (MMC DAB) [5] [7] and also the Modular Multi-level DC-DC converter (M2DC) [5] [6] are attractive.The first one is an isolated DC/DC converter since it is composed by two MMC converters connected to each other on AC side with a medium frequency transformer [7].The second one, the M2DC converter, is a non-insulated DC/DC one and is less studied.Its schematic is presented in Fig. 1 [6].
Control problems have been identified in the MMC literature, as reported in [8].During the last decade, the design, modeling, and control of the original AC-DC version of the MMC have been largely studied but for the M2DC, these elements have been less focused [7] [9] [10].
MTDC grid stability studies, based on models of reduced phasor-model for MMC converters [11], have been carried out in recent years [12] [13].However, the study of these MTDC grid remains a challenge if the latter incorporates a DC/DC converter.Indeed no reduced model of DC/DC converter for HVDC is available except if the DC/DC topology is based on the MMC topology in AC/DC version like the MMC DAB.
This paper, in the first part presents the M2DC principles.In the second part, the Kirchhoff's laws will be used to establish a Reduce Order Model (ROM).This part will be splitted in three sections to develop the ROM model connected to each DC side and the third section will link both side to the global energy stored into the M2DC.The development of the control of this model follows in next part.Validation of both the model and its control will be carried out at a later stage.

II. AVERAGE ARM MODEL AND STATIC ANALYSIS OF
THE MODULAR MULTILEVEL DC CONVERTER (M2DC) The Modular Multilevel DC Converter (M2DC), described in fig. 1, is composed of at least two interleaved legs, interconnected across the two DC terminal voltages.Each leg consists of two arms made of series-connected Sub-Modules (SMs).The topology of these SMs can be either of half-bridge and/or full-bridge types depending on the case, if a DC-fault blocking capability is required on one DC bus or another, since it could require a negative voltage capability.Therefore, the number of SMs and its technology can be different for the upper arm compared to the lower one.
The M2DC offers an attractive insulated topology since it inherits some advantages from MMC, namely low switching frequency of individual semiconductors and low harmonic content in the current waveform.Furthermore, the M2DC requires fewer sub-modules (SM) compared to the "Dual Active Bridge MMC topology" since the stacks only process a part of the total converter power.This limits its overall cost and power losses (when a similar balancing control algorithm and therefore a similar switching frequency are used).
The analysis of the topology and the design of the control are focused on a single leg to simplify the presentation and will be generalised after that.Due to the large number of SMs in the M2DC, a simplified averaged arm model, fig.2, is used for dynamic and steady-state analysis.This simplified averaged arm model is agnostic to the types of SMs used (e.g.half or full bridges) and considers that the balancing control algorithm of the voltage of each sub-module is operating properly.For each arm, it is possible to define a modulated voltage v mj and a modulated current i Ctotj where j represents the upper (u) or the lower (l) arm: v Ctotj is defined as the sum of all the SMs capacitor voltages in the j arm. 1 and 2 are identical to an ideal chopper connected to an equivalent capacitor could therefore replace all arm SMs.This equivalent average model of a M2DC leg is presented in the gray box of fig. 2.
Consider v mjDC , the DC components of the modulated voltage of j arm and i jDC , the DC components of the arm j current.If the resistances and the submodules losses are neglected, v muDC , v mlDC , i uDC , i lDC can be expressed as in (3).
Consider P , the power flowing through the arm from one DC side to the other, then the DC powers of the upper and lower arms is given in (4).
As showed by the above equation the DC power flowing in the arm is opposite in each arm but more importantly it is non-zero.So, the energy stored in the capacitors will diverge.To avoid this, AC components are needed in the converter in order to nullify the average power of the arms.To avoid AC current into DC sides, the M2DC internal AC currents must have the same amplitude and a phase shift equal to 2π/m for a M2DC with m legs.The Kirchhoff's laws applied on the M2DC gives the following equations :

III. REDUCE ORDER MODEL DEVELOPMENT OF THE M2DC
The objectives of the Reduced Order Model is to produce a model representing the M2DC seen from each DC side.Therefore, it is possible to make the following assumptions.The model development will be based on the fact that the circulating currents are still remain into the converter and the power balancing between arms is correctly carried out.In this case the AC components will be neglected.
Due to the asymmetry of the converter and based on these assumptions, the following equation could be considered: Where k is the arm voltage design ratio.

A. DC1 Side ROM
In this part, based on the Kirchhoff's laws the DC1 side ROM can be developed.We can define the differential current based on the following equations: Based on (10), we could define the differential current like : And therefore with Introducing in ( 13), (9), it result the following equation: Based on ( 12) and (11), it could be possible to extend the equations to a M2DC with N legs in (15) to (18).with where v mdc1 is two time the average value of the v dif fj of each legs and represent the equivalent modulated voltage seen by the DC1 grid.It is link tho the V Ctot voltage by the DC1 equivalent modulation ratio m dc1 .And therefore From equations ( 16) to (18), the generalized Reduce Order Model of the DC1 side is as presented in fig. 3.As shown in ( 16), (18), and highlighted in the fig.3, the current flowing in the secondary DC grid has a direct impact on the DC1 side current.It induce a direct coupling between the two DC grid.This coupling is a major difference with the MMC ROM model [11].

B. DC2 Side ROM
By adding ( 7) and ( 8) and considering (5), it is possible to show the relation of the system on the DC2 grid.
Introducing in (21), (9), results in the following equation: Based on (20) and ( 5), it could be possible to extend the equations to a M2DC with N legs in (23) to (26).
where v mdc2 is the average value of the v sj of each legs and represent the equivalent modulated voltage seen by the DC2 grid.It is link to the V Ctot voltage by the DC2 equivalent modulation ratio m dc2 .And therefore From equations ( 23) to ( 26), the generalized Reduce Order Model of the DC2 side is as presented in fig. 4.

C. Internal equivalent M2DC capacitor
A capacitor storage element is linking both sides.This one is linked by all arms equivalent capacitors C tot .to finish building the Reduce Order Model of the M2DC, it is necessary to define the value of internal equivalent M2DC capacitor.
Based on (2), it is possible to estimate the power injected in the equivalent capacitor for a M2DC with one leg.By adding this equation applied on the upper arm and to the lower one divide by k, it is possible to obtain the following equation:  Since Therefore it is possible to develop the following one: therefore (30) becomes: Based on (31), it could be possible to extend the equations to a M2DC with N legs in (15) to (18).
Therefore, the equivalent capacitor C eq for a M2DC with N legs is equal to N times the sum of C totu with C totl .These equations allow to link the diagrams propose in Fig. 3 with fig. 4 by the equivalent capacitor and gives the ROM of the M2DC shown in fig. 5.

IV. DESIGN OF THE CONTROL OF THE M2DC REDUCE ORDER MODEL
To use and study this reduced model in a large network analysis, it is necessary to enslave the state variables of the latter, namely i dif f Σ , i dc2 and V ctot .This part aims to develop the ROM control of the M2DC converter.It will be decomposed into the current control independently and to end on the V ctot control.

A. DC1 current control
From the equation ( 16) and the Fig. 3, it is possible to edit the Laplace block modeling of the DC1 Side of the M2DC ROM.This model is presented in the upper part of the Fig. 6.Based on the inversion based rules, it is therefore possible to design the control of i dif f Σ with a PI controller due to the DC nature of this current.This control scheme is presented in the lower part of Fig. 6.In these control, i x * is the reference of the current i x .

B. DC2 current control
From the equation (24) and the Fig. 4, it is possible to edit the Laplace block modeling of the DC2 Side of the M2DC ROM.This model is presented in the upper part of the fig.7. as previously, The design of the i dc2 control with a PI controller is possible.This control scheme is presented in the lower part of Fig. 7.

C. Control of the Internal equivalent M2DC capacitor voltage
The control of the energy stored in the capacitor C eq can be modeled by (33).With (15), it is possible to split the p dc1 into parts link to i dif f Σ and i dc2 .therefore, (33) become : ).i dc2 (34) The control of the energy stored in the capacitor C eq could be done by i dif f Σ or by i dc2 .As in the literature [7], this paper propose to control it with the i dif f Σ to have the possibilities to compare both results.
From the equation (34), it is possible to edit the Laplace block modeling of the equivalent capacitor stored energy.This model is presented in the upper part of the Fig. 8. Based on the inversion based rules, it is possible to design the control of V ctot .This control scheme is presented in the lower part of fig. 8.

V. SIMULATION RESULTS
The M2DC ROM model and its control are validated in this part with parameters summarized in the table I.
To validate the value of the equivalent capacitor C eq , a first simulation was carried out for the M2DC as presented in [7] and the proposed ROM model with the energy control deactivated.The results are shown in Fig. 9.At t=50ms, a step from 0W to P N has been performed on p dc1 generating an increase in the energy stored in the capacitor of the converter.At t = 200ms, a step from 0W to P N was performed on p dc2 rebalancing the power on each side and stopping the increase in the energy stored in the converter.This simulation validate firstly the correct model of the DC1 and 2 sides since currents and powers are equal between the ROM model (ROM) results and the Electromagnetic transient (EMT) one.The value of C eq is validated since the evolution of the average value of V Ctot are the same for both model.shown in fig 10, i dc2 and the i dc1 will generate a step to regulate the V Ctot at the correct value.In a second time, a step is done on the references of V Ctot to 380kV and the i dc1 is increasing transiently to store the energy at the correct value.For this simulation, both EMT and ROM simulation give the same results validating the model and the control.This last part shows that the developed model preserves the average internal dynamic behaviour of the M2DC and validate the ROM model.This simplified model is suitable for large scale dynamic studies but as it does not take into account the block state behaviour of the M2DC converter, it cannot be used for fault studies.Thus, from this model, the introduction of M2DC into a small signal stability analysis is possible and constitutes the next step of the work to be carried out.

Fig. 6 .
Fig. 6.Control of the M2DC ROM for the DC1 side.

Fig. 7 .
Fig. 7. Control of the M2DC ROM for the DC2 side.

Fig. 8 .
Fig. 8.Control of the equivalent capacitor stored energy of the M2DC ROM.

Fig. 10 .
Fig. 10.ROM model and control validation C SM u ;C SM l Capacity of sub-modules C totu ;C totl Equivalent capacity of arm i s Current on low-voltage side i dif f Differential current v dif f , v s Decoupled modulated voltages.v Ctotu ;v Ctotl Voltage of equivalent capacity of arm N u ,N l Number of sub-module in the half-arm n u ,n l Number of active sub-module in the halfarm v mu ;v ml Modulated voltages φ Angle between the AC component of v ml and −v mu T ,ω Period and pulsation of AC variables θ Angle between i sAC and i dif f AC θ v