An improved isolated DC–DC Buck converter with high step-down ratio

ABSTRACT Please replcae the abstract with the following text:In this paper, a new isolated high step-down dc-dc topology based on buck converter is proposed. This structure reduces the amplitude of the voltage on the primary side of the transformer (which is an ideal type), which reduces the turn-ratio and leakage impedance. The recommended structure uses active clamped strategies to return the energy of leakage impedance and to repress voltage spikes. Under this condition, the overall efficiency of the converter can be enhanced impressively. The benefits of the proposed structure are simple structure, a simple control system that needs only two signals with a 180O phase shift, reduced power circuit components, the lower standing voltage of the semiconductor components in the high-voltage side, and a high conversion ratio. The proposed converter can be applied in low voltage (5V) applications with high input current such as computer applications. The operation modes of the recommended converter, designing of utilized circuit elements, steady condition analysis, and finally some experimental results of the built prototype of the recommended structure have been provided completely. The overall efficiency of the proposed topology at 250W is equal to 92%. Also, the amplitudes of input and output voltage are 380 V and 5 V, respectively.


Introduction
Recently, due to the reduction of fossil fuels and environmental problems such as air pollution, the demand for the use of electricity generated by renewable energy resources such as photovoltaic (PV) applications increased significantly.To decrease the conversion power losses, novel and efficient strategies are applied in renewable power energy systems (Chavoshipour Heris et al., 2019;Vosoughikurdkandi et al., 2021).Low voltage applications such as battery charges, and PV applications require dc-dc step-down converters (Biswas et al., 2021;Cornea et al., 2020;Khalili et al., 2020;Mathew et al., 2020;Misal & Veerachary, 2020;Mukherjee et al., 2020;Saadatizadeh et al., 2020;Steigerwald, 1984;Vecchia et al., 2021).
Producing high step-down voltage without forgetting the main features of conventional boost converter makes the issue difficult (Wai & Liaw, 2015).Multi-phase buck converter has some other benefits such as improvement in design strategy and low cost.These mentioned benefits make buck converter most property structure for voltage regulator modules (VRMs) in low voltage and high current conditions (L ´ Opez & Alarc ´ on, 2012; Wai & Liaw, 2015;Sun, Xu, Ren & Lee, 2009).Meanwhile, the traditional buck converter has an extremely low switching duty cycle for high step-down voltage conditions.This issue leads to poor current ripple elimination and increases overall power losses (conduction losses and switching losses; Kim et al., 2017;Wu et al., 2015;2013).To overcome these problems, the interleaved buck converter has been presented.A new topology of the interleaved buck converter has some benefits such as low switching losses and enhanced step-down conversion ratio (Lee et al., 2012).In the traditional buck converter, power components suffer from input dc voltage sources.Some buck converter based on interleaved topology has been presented in (Wu & Xing (2014;2010) ; Pan et al., 2014).These topologies have some benefits such as low standing voltage on the power diodes and power switches.
The new high step-down power converter has been presented in (Kirshenboim & Peretz, 2017).In this topology by using two interleaved phases, a high current can be delivered to the output.
Compared with non-isolated step-down topologies, the high step-down is obtained through the dc-dc flyback converter, forward structure, half-bridge, and full-bridge converters.The flyback dc-dc topology along with an air gap will lead to higher voltage stress on the involved switch.This requires the addition of a more snubber circuit such as an active clamped circuit.Meanwhile, these added elements increase losses, reduce efficiency, and increase the overall cost and circuit complexity.The number of a utilised circuit elements in the forward converter is more than the flyback converter.As a result, the overall cost of the forward converter is higher than the flyback converter.Forward converters can enhance efficiency using proposing different reset circuits (Kim et al., 2017).A new topology based on a hybrid full-bridge and LLC converter is presented.This topology has some features such as low circulation current loss and wide ZVS.To extend the ZVS range of lagging-leg power switches from zero to full load, a half-bridge should be added to the lagging-leg power switches (Lin & Chu, 2016).Also, an active method has been provided to enhance the overall efficiency of the proposed structure by using parasitic resonance energy recovery and regulating the voltage stress on the involved schottky diodes (Choi et al., 2016).A fast switch short circuit fault assessment strategy is suggested for the phase-shifted full-bridge converter.By combining the switching gate pulses and real-time index, the switch short-circuit fault (SFC) can be realised fast.Moreover, to keep the continuous operation mode of the system a remedial performance for the faulty phase-shifted full-bridge converter is presented in (Pei et al., 2015).
In this paper, a new isolated high step-down dc-dc topology based on buck converter is presented.A buck converter and a modified push-pull converter are merged in the proposed converter; thus, a high step-down ratio is easily achieved without an extremely low duty cycle or high turns-ratio of the transformer.The active-clamp strategy is applied in the proposed converter for recycling energy of the leakage inductor and improving the conversion efficiency.The advantages of the proposed converter can be highlighted as follows: • This converter reduces the amplitude of the voltage on the primary side of the transformer • Using active clamped strategies return the energy of leakage impedance and repress voltage spikes.• Enhance the overall efficiency.
• Simple structure, simple control system that needs only two signals with a 180 O phase shift, reduced power circuit components, a lower standing voltage of the semiconductor components in the high-voltage side, and high conversion ratio.
• The proposed converter can be applied in low voltage (5 V) applications with high input current such as computer applications.
• The frequency of the output current ripple is twice the level of operating frequency.
Therefore, the volume and parameters of the output inductor and capacitor can be lessened.
The proposed dc-dc converter is explained completely in section2.Section 3 presents the operation modes.Section 4, presents voltage gain Calculations.The standing voltage of power switches and power diodes are calculated in section 5. Current stress of utilised power switches and power diodes are calculated in section 6.Power loss analysis of the proposed converter is done in section 7. Energy storage of the utilised elements is discussed in section 8. Section 9 presents a comparison of the proposed topology with other converters.The experimental results of the prototype circuits with input voltage 380 V, output voltage 5 V, and output power rating 250 W are implemented to demonstrate the functionality of the proposed converters are presented in section 10.Finally, the paper is concluded in section 11.

Proposed dc-dc converter
Figure 1 indicates the recommended a new high step-down dc-dc buck converter.In the proposed topology, capacitors C 1 and C 2 are used to recover the use of transformer leakage energy and reduce the voltage stress on the utilised power switches.The standing voltage is the same as the across voltage of the capacitor C 1 that lower than the value of the input dc source.The internal resistance ðR dsðONÞ Þ of power switches is less value so, the conduction losses of the power switches are decreased.In the proposed topology, a dc-dc buck converter is applied to decrease the value of the input dc source.The voltage value of the primary side is the same as the voltage of the capacitor C 1 minus the voltage of the capacitor C 2 .Therefore, the turns ratio of the transformer T can be mitigated.Also, the proposed topology can reset the magnetic field of the transformer.The proposed converter utilises a full bridge rectifier is used.The frequency of the output inductor is two times the switching frequency.Therefore, the size of the output capacitor and inductor will be reduced.As well, the ripple of the output current will be enhanced.

Operation modes
Considering Figure 1, the L 1 , L lk and L O refer to an energy-storing inductor, leakage inductor, and output inductor, respectively.Considering this figure, the proposed converter consists of three main power switches ðS 1 ,S 3 Þ, two switching capacitors (C 1 and C 2 ) on the primary side, and a filtering output capacitor (C O ).Also, this topology uses five power diodes such as D 1 (a flywheel diode), D 2 ~ D 5 (rectifier diodes).The number of windings turns of the primary and secondary of the transformer is defined as N P and N S respectively.Finally, the turns ratio of the transformer can be obtained as: Figure 2. Shows the main waveform of the recommended topology in CCM operation mode.
There are eight operation modes in the transient states that are described as follows:

First operation mode [t 0 ~ t 1 ]
The equivalent circuit of this operation mode is shown in Figure 2(a).The power switches S 1 and S 2 are in ON-state at t = t 0 .Also, the switch S 3 is turned off.The obtained energy from input power dc supply (V in ) is stored by capacitor C 2 and inductor L 1 .Although, the stored energy of capacitor C 1 is pumped to capacitor C 2 and capacitor C 2 is charged.Also, the stored energy of the output inductor L out is released by diodes D 2 ~ D 5 .In this stage, the energy of input voltage and switching capacitor C 2 is delivered to the secondary side of the transformer.So that, the passing current through diodes D 3 and D 4 is reducing to a very low value (about zero) gradually but the passing current through diodes D 2 and D 5 are increasing.The related equations of this mode can be written as:

Second operation mode [t 1 ~ t 2 ]
Figure 2(b) presents the current path of this operation mode.At the beginning of this operation mode (t = t 1 ), as the prior operation mode, the power switches of the leading leg (S 1 and S 2 ) are turned on.In this mode the diodes D 3 and D 4 are reverse-biased.The leakage current and output inductor current can be calculated as:

Third operation mode [t 2 ~ t 3 ]
The equivalent electrical circuit of this mode is presented in Figure 2(c).At t = t 2 , the power switches S 1 and S 2 are in ON-state.Also, diodes D 2 ~ D 5 are forwarded-biased.In addition, the switching capacitor C 2 recovers the stored energy of the leakage inductor.
The stored energy of the inductor L 1 is pumped to capacitor C 1 via the flywheel diode D 1 .
As well as, the stored energy of output inductor (L out ) is delivered to the load.The current of inductor L 1 , output inductor L out and leakage current can be calculated as:

Fourth operation mode [t 3 ~ t 4 ]
This operation mode is indicated in Figure 2(d).At the beginning of the interval of this operation mode, the power switches S 1 and S 2 are still in OFF-state.Also, during this mode, the switch S 3 is in OFF-state.The capacitor C 1 is charged by obtaining the stored energy from the inductor L 1 .Also, the stored energy of the output inductor is injected into the load.

Fifth operation mode [t 4 ~ t 5 ]
The equivalent circuit of this operation mode is shown in Figure 2(e).At t = t 4 , the power switch S3 is in ON-state.Similarly to the first operation mode, the stored energy of the output inductor is pumped to the load, and the capacitor C 2 is discharged to the output through the transformer.The passing current through the diode D 2 and D 5 reduces to zero but the passing current through the diode D 3 and D 4 decreases.The leakage current can be obtained as: The key waveforms of the proposed topology are shown in Figure 3.

Sixth operation mode [t5~ t6]
The equivalent circuit of this operation mode is indicated in Figure 2(f).At t = t 5 , the power switch S 3 is turned on.In this mode, the rectifier diode D 2 and D 5 are reverse-biased.The capacitor C 2 is discharged to the output inductor and load.The current of output inductor and leakage current during this mode can be obtained as follows:

Seventh operation mode [t 6 ~ t 7 ]
The current path is presented in Figure 2(g).At t = t 6 , power electronic switch S 3 is in OFFstate.The capacitor C 1 can recover the energy of the leakage inductor.Also, the stored energy of the inductor L 1 is injected into the capacitor C 1 .In this operation mode, the output inductor is in the freewheeling mode and pumps stored energy to the load.Therefore, the leakage current and current of the output inductor can be calculated as:

Eight operation mode [t 7 ~ t 8 ]
Figure 2(h) shows the equivalent circuit of this mode.At the beginning of this interval (t = t 7 ), all of the utilised power switches are in OFF-state.Similar to the operation mode [t 3 ~ t 4 ], the stored energies of inductor L 1 and L out are delivered to switching capacitor C 1 and load, respectively.In addition, the performance of the transformer used in the proposed converter is forward power.Unlike a flyback converter in which energy is stored inside the core, here the transformer performs the same as the transformer in a full bridge converter and transmits power and energy directly.In Figures 2(a-c), the current of the transformer enters from the dotted side and causes the flux to form in one direction inside the transformer core.Also, in Figures 2(e-g), the current exits the dotted side of the transformer and causes the flux to form in the opposite direction of modes 2a, 2b and 2c inside the core.Also, in Figure 2(d,h), the current in the primary and secondary windings is zero and also the flux in the core is zero.

Voltage gain calculations of the proposed converter
In this part, to calculate the voltage gain of the proposed converter some assumptions must be considered as follows: • Across voltage of the utilised capacitors and current passing of the inductors can be considered to be constant values because of using infinitely large inductances and capacitances.
• The recommended topology works in CCM and the duty cycle is less than 0.5.In all of the following equations, the duty cycle is shown by D.
The voltage of switching capacitors C 1 and C 2 can be calculated as: The ideal voltage gain of the recommended structure can be calculated as: Concerning ( 16), it can be seen that in the recommended structure a high step-down ratio can be obtained using a smaller value of duty cycle or turns ratio.The relationship between duty cycle and voltage gain under different conditions of turn-ration is indicated in Figure 4.

Standing voltage
The standing voltage of the utilised semiconductor components can be calculated as: Furthermore, the recommended topology can use power diodes with low forward voltage drops for diodes D 2 ~ D 5 .As a result, the overall efficiency of the proposed structure can be enhanced.

Current stress of utilised power switches and power diodes
The current stress of the involved circuit components can be calculated as:

Conduction loss calculation
To calculate the conduction loss of utilised power switches and power diodes, the equivalent electrical circuit of the recommended topology is indicated in Figure 5. Considering this figure, r L;out and r L1 are the internal resistance of the output inductor and inductor L 1 , respectively.Also, the on-resistance of the power switches S 1 , S 2 and S 3 are indicated by r DS1 , r DS2, and r DS3 , respectively.In this circuit, the forward voltage of power diodes is shown by V D1 ~ V D5 .Also, the forward resistance of these diodes is r D1 ~ r D5 .
The voltage gain of the proposed converter can be obtained as: The overall efficiency of the recommended structure can be written as: The voltage gain and overall efficiency waveforms of the proposed topology are presented in Figures 6 and 7, respectively.To obtain these waveforms, the parameter of utilised circuit components are presented in Table 1.

Energy storage elements
In the recommended structure, to obtain a high bucking feature, it should be used capacitive elements which can save electrical energy.The equations of the utilised capacitors versus their across voltage can be obtained as:  Here, f is the switching frequency of the proposed converter.Table 1.Values of utilised circuit components.
The internal resistance of output inductor r Lo ¼ 2mΩ The internal resistance of utilised power diodes r D1 ¼ 112mΩ; r D2 ,r D5 ¼ r DZ ¼ 10mΩ The internal resistance of power switches

Comparison
In this part of the paper, the proposed topology is compared with other topologies.It should be noted that the power density can be calculated as follows: where the P out (W), volume (mm 3 ) denote the output power of each compared topology and total volume of each compared converter, respectively.
Considering Table 2, it can be seen that the value of cost/Pout of the proposed converter is less than all of the compared topologies except (Saadatizadeh et al., 2021).Also, based on this table it can be understood that the power density of the proposed topology is more than all of the compared topologies except (Saadatizadeh et al., 2021).

Simulation results
In this section, the proposed converter has been simulated on MATLAB Simulink software.As it can be seen from Fig. (8-13) Simulation results show that the proposed converter operates according to the theoretical analysis.The voltage stress of the switches S 1 , S 2, and S 3 are shown in Figure 8(a-c), respectively.Based on Figure 8(a), the peak voltage stress across switch S 1 is 480 V.With respect to Figures 8(b-c), the peak value of voltage stress of switch S 2 and S 3 is around 100 V. Based on Figure 8, it can be seen that the voltage across the switches S 1 , S 2, and S 3 contains only a positive half cycle.As a result, the type of these switches is unidirectional.Figure 8(a) shows the voltage stress of the switch S 1 .Based on this figure, the maximum blocked voltage of switch S 1 is equal to 500 V. Also, considering Figure 8(b-c) the maximum blocked voltage of switches S 2 and S 3 are equal to 100 V.
Regarding Figure 9, the across voltage of diode D 1 is around 380 V. Considering Figure 9(b-c), the peak value of across voltage of diode D 2 and D 3 is equal to 10 V. Therefore, in the experimental prototype diode, D 1 must be selected from the high voltage type.The voltage of the utilised capacitors C 1 and C 2 is shown in Figure 10  (a-b) respectively.Considering this figure, the peak value of the voltage of capacitors C 1 and C 2 is 100 V and 50 V, respectively.The voltage ripple of these capacitors is the acceptable values.Considering Figure 10(c), the amplitude of the output voltage is about 5 V. Based on this figure, it can be confirmed that the proposed converter is a high step-down dc-dc converter.The current stress of utilised power switches S 1 , S 2, and S 3 are indicated in Figures 11(a-c).Considering this figure, the maximum current stress of switches S 1 , S 2 , and S 3 are around 3A, 5A, and 10A, respectively.Also, the waveform of passing current of utilised diodes is shown in Figures 12(a-c).With respect to this figure, it can be seen that the current stress of diodes D 1 , D 2, and D 3 are around 3A, 50A, and 50A, respectively.The current waveforms of inductor L 1 , inductor L K , output inductor, and output current waveform are presented in Figure 13(a-d), respectively.With respect to Figure 13(a), it can be seen that the maximum value of I L1 is equal to 3 and the average value of I L1 is equal to 2.5.Based on Figure 13(b), it can be seen that maximum value of I LK is equal to 10A.Considering Figure 13(c), the average value of output current is equal to 50 A. Regarding Figure 13(d), the amplitude of output current of the proposed dc-dc converter is around 50A.

Experimental results
In this part of the paper, to verify the provided simulation results and validate the performance of the proposed converter, some experimental results have been presented.In this test, the amplitude of the utilised input dc source is assumed to be 380 V (V in =380 V).The peak value of the generated output voltage is equal to 5 V (V out;peak ¼ 5V).In this case study, the switching frequency of the involved power switches is assumed to be 46 kHz.Also, the peak value of output power is 250 W. The utilised components in the prototype built and their explanations are provided in Table 3. Figure 14 indicates the photo of the prototype built of the proposed converter.Based on Figure 14, Labelling is done in the laboratory setup.It is also described below the figure of each part of the circuit.No. 1 is related to the microcontroller board.No. 2 is for the gate driver board.No. 3 is related to isolated transformers with multiple different outputs.No. 4 is related to the power autotransformer.No. 5 is the power diode bridge.No. 6 shows the electrolytic capacitors.No. 7 indicates the driver circuit related to the LA55P current sensor.A power supply of + 12 V dc and −12V dc is required to operate this sensor.No. 8 The voltage of the utilised capacitors C 1 and C 2 is shown in Figure 16(a-b) respectively.Considering this figure, the peak value of the voltage of capacitors C 1 and C 2 100 V and 50 V, respectively.The voltage ripple of these capacitors are the acceptable values.
The current waveforms of the leakage inductor (L lk ) and output inductor (Lo) are presented in Figure 17(a-b) respectively.Due to the frequency of the output current being two times the switching frequency, the current ripple of the output inductor is reduced.Figure 18(a) depicts the current stress of diode D 1 and inductor L 1 .Also, the current stress and driving gate voltage of power switch S 1 is shown in Figure 18(b).Furthermore, the experimental results of the suggested structure which includes current waveforms of power switch S 1 and inductor L 1 are indicated in Figure 18(c).

Comparison between simulation and experimental results
In this part of the paper, to verify the obtained experimental results a comparison study between simulation results and experimental results is performed.Based on Figures 8 and 9, the experimental results of the switches S 1 , S 2, and S 3 and diode D 1 , D 2, and D 3 which are indicated in Figures 14 and 15 prove the simulation results.As mentioned, the simulation results of voltage across capacitors C 1 and C 2 are presented in Figure 10.By comparing the experimental results of voltage across the capacitors C 1 and C 2 which are presented in Figure 16, it can be seen that the experimental results confirm the presented simulation results.As mentioned before, the simulation results of current waveforms of inductor L 1 , inductor L K , output inductor and output current waveform are presented in Figure 13(a-d), respectively.By comparing these figures with the obtained related experimental results which are presented in Figures 17 and 18, it can be understood that the experimental results prove the simulation results.

Conclusion
In this study, a new isolated high step-down dc-dc converter was presented.In this topology without adjusting the turns ratio of the transformer at a high range and extremely large duty cycle, a high step-down ratio can be obtained.Also, to recycle the energy of the leakage inductor and enhance the overall efficiency of the proposed converter the active clamped strategy was utilised.Also, the proposed structure reduces the amplitude of the voltage on the primary side of the transformer (which is an ideal type), which reduces the turns-ratio and leakage impedance.The proposed converter has some benefits such as simple structure, a simple control system that needs only two signals with a 180 O phase shift, reduced power circuit components, the lower standing voltage of the semiconductor components in the high-voltage side, and high conversion ratio.The rate of the core which is used in the transformer can be enhanced and as a result, the volume of the converter can be reduced.In the proposed converter, the frequency of the output current ripple is two times the switching frequency.In the prototype built of the suggested topology, the voltage amplitude of the input power dc supply and output is 380 V and 5 V, respectively.In this paper, the simulation results have been presented.To confirm the accurate performance and feasibility of the proposed converter, some experimental results with output power 250 W have been presented.The overall efficiency of the recommended topology at output powers 100 W and 250 W is 91.5%.

Figure 2 .
Figure 2. The operation modes of the proposed dc-dc converter: (a) first operation mode, (b) second operation mode, (c) third operation mode, (d) fourth operation mode, (e) fifth operation mode, (f) sixth operation mode, (g) seventh operation mode, (h) eighth operation mode.

Figure 3 .
Figure 3. Key waveforms of the proposed dc-dc converter.

Figure 4 .
Figure 4.The ideal voltage gain of the recommended topology.

Figure 5 .
Figure 5. Equivalent circuit of the recommended topology.

Figure 7 .
Figure 7.The overall efficiency of the proposed topology.

Figure 6 .
Figure 6.The non-ideal voltage gain of the recommended topology.

FreewheelFigure 15 .
Figure 15.The standing voltage of the utilised semiconductor components: (a) standing voltage of switch S 1 and diode D 1 (200 V/div) (b) standing voltage of power switches S 2 and S 3 (50 V/div) (c) standing voltage of power didoes D 2 and D 3 (5 V/div).

Figure 20
Figure20shows the experimental efficiency of the converter for different output powers and at three different output voltages.For the same output power, the efficiency increases as the output voltage of the converter increases.The maximum efficiency of the converter at around 100 W is 92.5%.Most of the converter losses are lost on the output diodes.If an active diode is used instead of the output diodes, then the conduction losses are reduced and the converter efficiency is significantly increased.

Figure 20 .
Figure 20.Experimental converter efficiency for different output powers and voltages.

Table 2 .
Comparison of the proposed converter with other topologies.

Table 3 .
The utilised circuit elements in the recommended converter.