A Power Flow Tracing Method Based on Power Electronic Signaling for P2P Electricity Trading in DC Microgrids

—This paper proposes a novel power flow tracing method based on power electronic signaling (PES) for peer-to-peer (P2P) electricity trading in DC microgrids. It employs a superimposed low-frequency sinusoidal carrier to trace DC power flows according to the bus port impedance characteristics of power converters. In order to support fair and accurate P2P trading, source-to-load power signaling (S2LPS) and source-to-source power verification (S2SPV) methods are presented. Through S2LPS, the P2P DC power flow from a specific distributed source (DS) to a power load (PL) is determined by detecting the carrier’s active power at the PL’s bus port. The same carrier is used to check the actual output power of the DS by S2SPV. By implementing S2LPS and S2SPV, the power flows of the system are traced, recorded, and verified by each DS and PL. Accurate power flow tracing is achieved on the physical layer, providing reliable data for P2P electricity trading. The principles of the proposed method are deduced in detail. Furthermore, the modifications to the control loops of DSs and PLs are depicted for implementations in DC microgrids. Finally, a 2.5kW experimental platform is built to validate the correctness and feasibility of the proposed method.

I. INTRODUCTION  HE increased penetration of renewable energy sources (RESs) and energy storage sources (ESSs) poses significant challenges in system reliability and power management efficiency to traditional AC grid, and the DC microgrid could be a possible solution due to its improved efficiency, reduced complexity, and greater flexibility [1]- [3]. In DC microgrids, there are numerous prosumers that can both produce and consume power depending on different conditions and operation modes. Consequently, peer-to-peer (P2P) trading is a promising technique for DC microgrids as a next generation energy management method [4]- [10]. Through decentralized P2P structure, Prosumers can actively participate in the electricity market by acting as either sellers selling excess energy, or buyers purchasing electricity from other sellers. The AC grid can also reap significant benefits from the P2P structure, such as lower peak demand, lower investment costs, and reduced reserve requirements [4].
The P2P trading structure can be divided into two layers [5]: virtual layer and physical layer, as shown in Fig. 1. In the virtual layer, pricing mechanisms [6]- [7] and information systems [7]- [8] are implemented for financial and electricity transaction settlements. In the physical layer, traditional electrical networks are employed, and extra metering infrastructures are installed at bus ports of prosumers for input/output power measurements. Once the transaction between two prosumers is settled, the electrical network in the physical layer transfers power from the seller to the buyer in accordance with the virtual layer's instructions.
In P2P trading, most studies concentrate on the trading schemes [6]- [8] in the virtual layer, while physical layer only acts as a passive actuator [9]- [10]. However, in practice, due to the absence of third-party arbitrators in the P2P scheme, disputes between seller and buyer regarding the actual transmitted power may arise [5]. Furthermore, due to varying electricity storage statuses and power qualities of the sellers, and various demands of the buyers, distinguished electricity prices between each seller and each buyer are preferred in P2P trading scheme [11]- [13]. In this case, determining real-time P2P power flows contributes to a fair and reasonable pricing mechanism, and it could also facilitate the energy scheduling optimization in the virtual layer [14]- [15]. Therefore, to ensure accurate and fair P2P transactions, it is necessary to trace the real-time P2P power flows from each seller to each buyer in the physical layer. analogue/digital messages and power flows, making the messages incapable of representing quantitative power flow information. Thus, current PES methods cannot be directly used in power flow tracing. This paper proposes a novel PES method for P2P power flow tracing in residential DC microgrids to support fair and accurate P2P electricity trading. Inspired by current disturbance-based signaling methods, it employs superimposed low-frequency carriers to stamp DC power flows for physical layer tracing from the DS (i.e., seller) to the PL (i.e., buyer). In contrast to traditional PES methods, the bus port impedances of power converters are controlled in the proposed method. Therefore, mathematical relationship between power flow and the carrier can be established, allowing the carrier to represent power flow information.
In the proposed method, a carrier with controlled active power is injected into the DC bus by each DS in rotation. Each PL measures the received active power at bus port to determine the source and corresponding amount of received DC power, which is termed as source-to-load power signaling (S2LPS) method in this paper. In order to ensure the S2LPS data authenticity, the voltage amplitude of the carrier is used by other prosumers to check the actual DC output power of the DS, which is named as source-to-source power verification (S2SPV) method in this paper. S2LPS measures the power flow between each DS and each PL, providing reliable physical layer data for P2P trading. The S2LPS and S2SPV data can be cross-checked, resolving trust issues between DSs and PLs. This paper is organized as follows. The origin of the proposed method is illustrated in Section II, and the principles of the proposed method, including S2LPS and S2SPV, are depicted in Section III. In Section IV, the implementations of the proposed method are provided. In Section V, a prototype platform is built to verify the feasibility of the proposed method. Finally, conclusions and prospects are given in Section VI.
The main contributions of this paper are as follows: 1) For the first time, the P2P power flow tracing method based on a superimposed low-frequency carrier is proposed. The method successfully traces and monitors the power path from each seller to each buyer. The tracing results can be used to optimize the financial and energy scheduling model in the virtual layer. 2) A secondary verification mechanism is designed based on the superimposed carrier. The proposed mechanism allows the distributed ledger of P2P trading to be checked, which enhances system security.
3) The implementations of the proposed method are presented.
The experimental results on a 2.5kW experimental platform validate the correctness and feasibility of the proposed method.

II. ORIGIN OF THE PROPOSED METHOD
In a DC microgrid with a single DS and multiple PLs, the power sourcing from the DS to the PLs can be traced by measuring the DC current in each PL. However, when multiple DSs supply power concurrently, the power flows between DSs and PLs are mixed up in the DC bus and cannot be distinguished. In this case, in order to trace the power flows from a DS to PLs, it makes sense to stamp the power flow by superimposing a carrier with frequency fv on DC voltage or current. Furthermore, according to circuitry basis, a DS's power distribution among PLs is determined by the DC bus port impedances of the PLs. If the PL's DC impedance is proportional to the impedance at carrier frequency fv, then the DC power distribution can be derived based on the measured AC impedances.
Before proceeding, it is necessary to review the input impedance of a constant power load (CPL). As shown in Fig.  2(a), a CPL can be divided into two parts: input capacitor Cbus and the DC-DC converter paralleling with Cbus. The input power of the CPL is in_CPL in_R dc _in_CPL where V in_CPL and I in_R are the converter's DC input voltage and current respectively. Since P dc_in_CPL is constant, it is deduced that where v in_CPL and i in_R are the converter's input voltage and current disturbances at fv respectively. Derived from (1) Therefore, the converter's input impedance at fv is where −R L is the DC closed-loop input impedance of the CPL. Equation (4) indicates that the input impedances of the DC-DC converter are the same at fv and DC. Thus, CPL can be simplified as an input capacitor Cbus paralleling with a negative resistor RL at fv, as shown in Fig. 2(b). The resistor RL consumes active power, while Cbus absorbs reactive power. Due to this feature, the superimposed carrier can provide information about the impedance of CPLs. By analyzing the active power component of the superimposed carrier at bus port of each CPL, the P2P power flow can be determined.

A. System Overview
The structure of the DC microgrid employing the proposed method is illustrated in Fig. 3. In the system, all sources and loads are connected to the DC bus via dedicated designed PEICs, which are bidirectional DC-DC converters in this paper. When a prosumer acts as a DS (e.g., DS #1), it supplies power for other prosumers. When a prosumer acts as a PL (e.g., PL #1), it consumes power from DC bus.
It should be noted that the system is equipped with a conventional communication network, which enables the system to perform refined energy scheduling and P2P electricity trading in the virtual layer. By adapting the proposed method in the physical layer, the process of P2P trading can be verified. In order to provide a complete description of the method, the power flows of the system should be modeled.
Assume that the DC microgrid is in island mode, and the power flow between any two DS and PL remains constant throughout the power tracing period Tp, implying that each PL operates as a CPL. In the model, the prosumers are divided into N DSs and M CPLs. The DSs are labeled as DS #i (i=1, 2, ..., N), and the CPLs are labeled as CPL #j (j=1, 2, ..., M) in turn. Thus, the system's power flows during Tp can be abstracted and written as 1 sys 1 1 where Pij denotes the DC transferred power from DS #i to CPL #j. By implementing S2LPS and S2SPV method, Ƥsys is calculated and verified within Tp. The construction process of Ƥsys is depicted as follows.
As shown in Fig. 4, according to the number of DSs (N), Tp is divided into 3N slots, which are denoted as T1a, T1b, T1c, T2a, T2b, T2c,…, T Na , T Nb , T Nc in order.
Tia (i=1, 2, ..., N) is the S2LPS slot for DS #i. In this period, a low-frequency sinusoidal carrier with specified active power is superimposed by DS #i. Based on the carrier, Pij(j=1, 2, ..., M) is measured by CPL #j. The measured data are filled into Ƥsys and compared with the transaction agreements settled in the virtual layer. Meanwhile, the data is broadcast to the rest prosumers via the conventional communication network.
Tib (i=1, 2, ..., N) is configured as S2SPV slot for DS #i. During Tib, S2SPV method is employed, and the carrier with controlled active power is continually superimposed by DS #i. The voltage amplitude of the carrier is used by other DSs to estimate the output power of DS #i (P dc_o_DSi_es ). Meanwhile,  the actual DC output power of DS #i (Pdc_o_DSi) is broadcast by DS #i to other DSs via the communication network. In every other DS, Pdc_o_DSi is compared with P dc_o_DSi_es to ensure its authenticity.
Tic (i=1, 2, ..., N) is the idle slot arranged for the power transition process between Tib and T(i+1)a. During this period, the superimposed carrier is halted.
At the end of Tp, Every Pij in Ƥsys is filled. Furthermore, Ƥsys can be verified vertically by In order to enhance the data reliability, the input power of CPL #i in Tia can be used to cross-check with data measured by S2LPS method, which is With (7), Ƥsys can be checked horizontally. After the aforementioned process, Ƥsys is constructed and verified in each prosumer by S2LPS and S2SPV. Fig. 5 depicts an example of a DC microgrid with two DSs and two CPLs applying the proposed method. It can be observed that the power flows between any two prosumers are monitored. The measured results Ƥsys capture the real-time electricity transaction situation in the physical layer, which can be utilized to validate the distributed ledger in the virtual layer, ensuring the ledger's security and authenticity.
It should be noted that the frequency of the superimposed carrier, fv, must be chosen carefully to ensure the feasibility of the proposed method. In order to achieve high-precision control while minimizing hardware modification, fv should be set lower than the control loop's cut-off frequency fc. Since fv is much lower than the switching frequency fs, the impact of the switching ripple on the proposed method can be eliminated by signal filters, and it is ignored in this paper.
The principles of S2LPS and S2SPV methods are put forward and analyzed in detail as follows.

B. Principle of S2LPS
Measuring the P2P power flow from a DS to a CPL is the foundation for constructing Ƥsys. This is accomplished through S2LPS method, which is based on a superimposed carrier with controlled active power. For instance, the DC transferred power from DS #1 to CPL #1, P11, is measured by S2LPS as follows.
In residential DC microgrids, the line impedance is neglectable compared with the load impedance, so the DC equivalent circuit of the DC microgrid is shown in Fig. 6, where N DSs and M CPLs are all connected to the point of common coupling (PCC). CPL #j can be simplified as a negative resistor RLj, which is the DC closed-loop input impedance of CPL #j.
As depicted in Fig. 7(a), during T1a, a sinusoidal current İo _DS1 1a is superimposed by DS #1 into the DC bus, where superscript "1a" denotes the time slot T1a, and subscript "DS1" denotes the converter. Suppose the angular frequency of İo _DS1 In order to build a relationship between DC power and AC active power at carrier's frequency, a linear correlation is adopted in the S2LPS method, where P ac_o_DS1 1a and P dc_o_DS1 1a denotes DS #1's AC active power at fv and DC output power in T1a, respectively, and Kv is the predefined S2LPS gain. Equation (9) is the key to S2LPS method. At fv, the output active power of DS #1 is Thus, the amplitude of İo _DS1 1a should be controlled by DS #1 as where V̇o _DS1 1a is the output voltage of DS #1 at fv, and θ DS1 is the angle formed by İo _DS1 1a and V̇o _DS1 1a . Since the line impedance is ignored, it can be found that , 1, 2,3,..., , where V̇o _DSi 1a and V̇i n_CPLj 1a are DS #i's output voltage and CPL #j's input voltage at fv in T1a respectively. Thus, at fv, the output active power of DS #1 and input active power of CPL #j are Prosumer #1(DS #1) Theoretical transferred power settled by both prosumers Actual transferred power measured by S2LPS method Actual source output power checked by S2SPV method Fig. 5. An illustration example of the proposed system.
is CPL #j's input current at fv, and θ CPLj denotes the angle formed by İi n_CPLj 1a and V̇P CC 1a .
At fv, assume that no active power is generated by other DSs, so the equivalent circuit of DS #i(i=2,3,…,N) can be simplified to only one capacitor Cbus, as shown in Fig. 7(b). Besides, CPL #j can be simplified as Cbus paralleling with RLj, as illustrated in Fig. 7(c). Based on Fig. 8 According to (12)- (14), it can be deduced that Equation (15) indicates that the carrier's active power and a DS's DC output power distribution among CPLs are the same. By substituting (9) into (15), it can be derived as Therefore, P11 can be determined by measuring the active power of the carrier at bus port of CPL #1. The preceding derivations demonstrate that the P2P power flow from a specific DS to a CPL can be measured by S2LPS. However, it should be noted that the derivations are founded on three premises. First, the control loop of DS #1 should be modified so that İo _DS1 1a can be generated precisely as (11). Second, no active power at fv should be generated by other DSs. Third, each PL should function as a CPL at fv. The specifics of the implementations to ensure the three premises will be addressed in Section IV.

C. Principle of S2SPV
With S2LPS, the construction of Ƥsys can be completed and its horizontal dimension data can be checked according to (7). However, in a P2P trading system, trust issues might occur between a DS and a PL due to the disagreements about the actual transferred power. To build a more convincible Ƥsys, the data authenticity of Ƥsys should be checked in the vertical dimension as well, and it can be accomplished by S2SPV method in this paper.
With S2SPV method, a DS's actual output power is checked by other DSs using the superimposed carrier. For example, the verification process of DS #1's actual output power Pdc_o_DS1, which is carried out in T1a and T1b, is depicted as follows.
As shown in Fig. 9, suppose the droop characteristic of DS #1 in T1a is where Thus, it can be written as During T1b, the superimposed carrier is still generated and controlled by DS #1 in the same way as in T1a, which is Besides, the system equivalent circuit at fv in T1b is the same as that in T1a. Thus, it can be derived that load L v bus 1 where Z load is the load impedance of DS #1. By substituting (22) into (11), it can be derived as Since the line impedance is ignored, it can be found that According to (19), (20), (24) and (25), the output power of DS #1 can be estimated by every other DS #i(i=2,3, ⋯ N) as dc_o_DS 1a 2 dc_o _DS1_es 2 , and the verification process for P dc_o_DS1 1a is completed. The results are also distributed to other prosumers via the conventional communication network.
The above derivations demonstrate the verification process for DS #1's output power. Through S2SPV, the data authenticity from each DS is guaranteed by other prosumers in the system. Besides, these data can be cross-checked with data measured by S2LPS, solving trust issues between DSs and PLs.

IV. IMPLEMENTATION OF PROPOSED METHOD
This section aims to clarify the modification schemes for implementation of the proposed method. All changes are made in power control loops, making it simple to embed in the PEIC's microcontrollers.
According to the analysis in Section III, control loop modifications should be implemented during Tia and Tib. For instance, the modifications in T1a are depicted as follows.

A. Modification for DS #1
Conventionally, the control scheme of a bidirectional DS in DC microgrids consists of three loops, which are the droop control loop with droop coefficient rd, the output voltage loop with a proportional-integral type compensator Gv1(s), and the inductor current loop with a proportional-integral type compensator Gi1(s).
As mentioned in Section III. B, İo _DS1 1a contains the output power information of DS #1. To precisely generate İo _DS1 1a as (11), an active power generation (APG) loop is added to the control scheme, as shown in Fig. 10. At fv, DS #1's output current and voltage can be expressed as respectively. Thus, P1 can be derived as To extract the DC component, P1 is passed through a notch filter where c_nf1=2v is the center frequency of the notch, and 1_nf1 and 2_nf1 are two coefficients related to the notch depth and the bandwidth. The gain-frequency diagram of Gnf1(s) is illustrated in Fig. 11. So P2 can be expressed as Pref is the active power reference, which is To obtain the amplitude reference IAP_ref, the deviation between P2 and Pref is compensated by a PI controller Gap(s) with low bandwidth. With IAP_ref, the output of APG loop is superimposed into the inductor current loop. In steady state, iAP_ref is a sinusoidal signal, so a proportional-integral-resonant type controller is adopted in the inductor current loop to achieve errorless control, where Kp_mi1, Ki_mi1 and Kr_mi1 are the proportional, integral, and resonant coefficients of Gmi1(s) respectively, and ω c_mi1 determines the bandwidth of G mi1 (s is applied in the voltage compensation loop, where c_nf2=v is the center frequency, and 1_nf2 and 2_nf2 are two coefficients. The gain-frequency diagram of Gnf2(s) is shown in Fig. 11.

B. Modification for Other DSs
The DS #i's (i=2, 3, …, N) inductor current and output voltage are Gnf2(s) where v in_DSi 1a (t) is the DS #i's input voltage in T1a.
When DS #1 is sending İo _DS1 1a , the active power generated by every other DS #i should be zero, implying that io_DSi(t) cos θ DSi should be constant. Since vin_DSi(t) is constant, it should be satisfied that According to (38), an active power elimination (APE) loop is added paralleling with the original output voltage loop, as illustrated in Fig. 12. A resonator is employed to precisely control İL _DSi , where ω c_rr1 =v is the center frequency, and 1 and 2 are two coefficients that satisfy Besides, the phase delay of Grr1(s) at fv is zero, as illustrated in Fig. 11. Thus, (38) can be satisfied with the introduced Grr1(s). 12. To achieve error-free tracking of the reference, the current loop controller is modified to Gmi1(s) with a resonant link, and Gnf2(s) is used to maintain the DC control characteristic.

C. Modification for CPLs
Conventionally, the control scheme of a bidirectional PL in DC microgrids consists of two loops: the output voltage loop and the inductor current loop, as depicted in Fig. 13.
At fv, the PL should function as a CPL, which means the closed control loop gain should be sufficient. Thus, the inductor current compensator is modified to  Fig. 14, Zio_CPL is the open-loop input impedance and Zic_CPL0-Zic_CPL4 are the closed-loop input impedances with different Kr_mi2. It can be observed that with a sufficient Kr_mi2 (Kr_mi2=90), the input impedance appears to be a negative resistor at 25Hz, and the magnitude gain at 25Hz is 38.1dB (80), which is the same as the DC input impedance. Therefore, the correctness of the CPL modification scheme is proved. CPL #j (j=1, 2, …, M) Zic_CPL_2, Kr_mi2=20 Zic_CPL_3, Kr_mi2=50 Zic_CPL_4, Kr_mi2=90

V. EXPERIMENTAL RESULTS
The correctness of the proposed power tracing method has been experimentally validated on a 2.5kW DC microgrid platform. The structure and photo of the platform are shown in Fig. 15 and Fig. 16 respectively, and the platform parameters are provided in Table I. In the experimental system, prosumers #1 and #2 act as DSs, while prosumers #3 and #4 act as CPLs. TMS320F28377 from Texas Instruments is used in each converter to implement the proposed method, and MOSFET C3M0065090D from CREE is selected as the switches for bidirectional converters. The experimental control parameters are listed in Table II. Based on the platform, two experiments are carried out. In Experiment I, the fundamentals of S2LPS are checked, while in Experiment II, an application example is provided, in which S2LPS and S2SPV are both applied.

A. Experiment I: S2LPS Test
This experiment aims to check the correctness of S2LPS principle. In this test, in order to determine the actual P11 and P12, DS #2 is disconnected from the DC bus, and DS #1 supplies power for both CPLs. When DS #1 is sending out İo _DS1 1a , the operational waveforms of DS #1, CPL #1 and CPL #2 are demonstrated in Fig. 17(a)-(c), respectively.
In Fig. 17(a), v o_DS1 and i o_DS1 are the AC components of v o_DS1 and i o_DS1 , respectively. In order to offer a more explicit view, they are passed through band pass filters (BPFs) with a center frequency of 25Hz to obtain v o_DS1_fil and i o_DS1_fil , respectively. The DC output voltage Vo_DS1 is 373.1V and the DC output current Io_DS1 is 4.16A. Thus, the actual DC output power Pdc_o_DS1 is 1552W, and the theoretical active power at 25Hz should be 0.3104W based on (9). Calculated by v o_DS1_fil and i o_DS1_fil , the output active power of DS #1 at 25Hz is 0.3088W. The error between theoretical and v o_DS1 Time:50ms/div Fig. 17. Operational waveforms of (a) DS #1 (b) CPL #1 (c) CPL #2.
Prosumer #4(CPL #2)  experimental results is less than 1%, which verifies the effectiveness of the APG loop. In Fig. 17(b), v in_CPL1 and i in_CPL1 are the AC components of v in_CPL1 and i in_CPL1 , respectively. They are passed through the same BPFs to obtain v in_CPL1_fil and i in_CPL1_fil , respectively. Due to the control loop modifications for CPL, no component of 25Hz exists in vo_CPL1 and io_CPL1.
For CPL #1, the actual DC input power P dc_in_CPL1 1a is calculated as 1026W. Calculated by v in_CPL1_fil and i in_CPL1_fil , the input active power P ac_in_CPL1 1a is 0.2028W at 25Hz. According to (16), P11, which is the P2P transferred power from DS #1 to CPL #1, is estimated as 1014W by S2LPS. The error between estimated and actual results is 1.2%.
For CPL #2, similarly, the actual DC input power P dc_in_CPL2 1a is calculated as 522.8W, while the estimated P12 is 515.0W according to a measured active power P ac_in_CPL2 1a of 0.1030W. The estimated error is 1.5%, which verifies the correctness of S2LPS.
The calculation results of Experiment I is summarized in Table III. The estimated errors come from several factors. First, parasitic parameters are not considered in the derivation of S2LPS method. Second, the non-infinite control loop gain results in nonideal control characteristic. Third, the rounding and quantization errors in the computation process reduce the accuracy of the experimental results.

B. Experiment II: System Test
In this experiment, the system employing the proposed power flow tracing method is tested, and the correctness of S2SPV is checked. Based on S2LPS and S2SPV, the power flow matrix Ƥsys is established.
In this test, DS #1 and DS #2 supply power for the DC bus. CPL #1 and CPL #2 consume around 1kW and 1.5kW of constant power respectively. The power flow tracing and verification processes for DS #1 are illustrated as follows.
As shown in Fig. 18 about /2, confirming the correctness of the modification method in Section IV. B. Therefore, in the equivalent circuit at 25Hz, DS #2 can be simplified as Cbus.
In steady state of T1a, the CPLs determine the transferred power from DS #1 by calculating the input active power at 25Hz. As shown in Fig. 20(a)-(b), the input active power of CPL #1 and #2 are measured as -0.0976W and -0.1445W respectively. According to (16), P11 and P12 can be calculated by S2LPS as 488.2W and 722.3W respectively.
At the beginning of T1b, DS #1 changes its droop coefficient from rd=1V/A to rd_v=0.95V/A. Thus, DS #1's output current gradually increases and DS #2's output current gradually decreases, as illustrated in Fig. 18. The length of the transition process is Ttr=4.1s. According to the measured VPCC, Io_DS1 and Io_DS2, the DC output power variation ΔP dc_o_DS2 is 227.8W.    In T2b, the correctness of P dc_o_DS2 1a can be checked by S2SPV. Besides, Ƥsys can be double-checked according to (6) and (7). The verification results of Experiment II are summarized in Table IV. The estimated errors are all less than 2.5%.
In this experiment, the construction of Ƥsys takes 40s, which is because Tia, Tib and Tic are designed long enough to ensure the stabilization of the control loop outputs. It should be noted that Tia, Tib and Tic can be significantly reduced through dedicated control parameter designs.

C. Power Loss Analysis
The proposed method introduces low-frequency voltage and current disturbances to the system, resulting in additional power losses. Take DS #1 as an example, the additional power losses Paddi_DS1 are analyzed as follows.
Suppose the output voltage vo_DS1 and inductor current iL1 of DS1 are where A and B are the peak value of vo_DS1 and iL1 at v, respectively. In general, the converter's total power losses Ploss are where IL1, Irms_v and Iripple represent the iL1's DC value, iL1's RMS value at v, and iL1's peak-to-peak value of the switching ripple, respectively. RDS_on is the conduction resistance of the MOSFET, and D is the duty cycle of S1. Since S2 is soft-switching, the switching loss Psw is oss sw vi dead_time rr C P P P P P     , where Pvi denotes the power loss on S1 caused by the overlap of voltage and current, Pdead_time is the anti-paralleled diode conduction loss of S2 during dead time, Prr is the diode reverse recovery loss，and PCoss is the output capacitor loss of S1 and S2.
where tr and tf are the rise and fall time of the MOSFET, respectively, Vf is the forward conduction voltage drop of the diode, tdead-time is the duration of dead time, Qrr is the diode reverse recovery charge, and Coss is the MOSFET's output capacitance.
The inductor loss PL consists of the core loss and the conduction loss. Since L1 works in continuous-current mode, the core loss is ignored. So, the inductor loss is calculated as where ResL is the parasitic resistance of L1, and IC is the RMS current on the capacitor. The capacitor loss PC is where IC is the RMS current on Cbus, and Resr_C is the parasitic resistance of Cbus. The additional power losses Paddi_DS1 are oss addi_DS1 cond vi L C C P P P P P P            .

VI. CONCLUSIONS & FUTURE WORKS
This paper proposes a power flow tracing control method for fair and accurate P2P trading in DC microgrids. The proposed method, which consists of S2LPS and S2SPV, is established on a superimposed low-frequency carrier. S2LPS measures the power flow between each DS and each CPL, providing reliable physical layer data for P2P trading. S2SPV checks the actual output power of DSs, so the data authenticity from each DS can be guaranteed by other prosumers in the system. The S2LPS and S2SPV data are cross-checked, resolving trust issues between DSs and PLs. The correctness and feasibility of the proposed method are validated on a 2.5kW DC microgrid platform, and the errors between estimated and actual data are all less than 2.5%. The proposed method obtains advantages of PES technique, including simple implementation, high reliability, and low cost. With the proposed method, advanced and dedicated transaction mechanisms considering the P2P power transmission status could be implemented in P2P trading scheme, ensuring the fairness and accuracy of P2P trading. The proposed method is also applicable in meshed DC microgrids and may inspire other researches in the area of P2P trading.
However, there are still some considerable issues that merit further research. First, power fluctuations caused by load variations are common in practice. Since the proposed method is established on the premise that each load is viewed as a CPL, the measuring period Tp should be much shorter than the intervals between two power fluctuation events. Consequently, the bandwidth of the proposed method should be further increased. Second, the impacts of the line impedance are not neglectable in large-scale DC microgrids. In this case, traditional line impedance measuring methods [22]- [24] can be employed and the corresponding correction items can be provided to compensate the measuring errors and guarantee the fairness of P2P trading [37]. Third, for future commercial products applications, the accuracy of the proposed method should be improved with advanced metering instruments and dedicated control parameter designs.