FPGA based 77GHz RADAR processing with novel linearisation

There is a renewed interest in low-cost Radio Detection and Ranging (Radar) with the growth in automotive autonomous driving. New System on a Chip (SoC) Field- Programmable Gate Array (FPGA) platforms are now available with onboard Analogue to Digital Converters (ADC)s and Digital to Analogue Converter (DAC)s, making them ideal for Radar processing applications. This is leading to some traditional analogue Radio frequency (RF) electronics being replaced by SoC FPGAs, using a Direct Digital Synthesis (DDS) for frequency ramping. Unfortunately, DDSs also produce unwanted spurious frequencies. In this work we propose an FPGA based Digital Signal Processing / Processor (DSP) processing block for a Frequency Modulated Continuous Wave (FMCW) automotive Radar, implemented on Xilinx’s FPGA, with a digitally generated Chirp, replacing a Voltage controlled oscillator (VCO). For the proposed Radar a novel method of linearisation, for precalibrating the Chirp and FPGA to perform parallel processing of the reflective signal. The proposed design was implemented using MATLAB Simulink Sysgen / Vivado and synthesised on a Zynq FPGA, together with a high-speed ADC and DDS. The design overcomes the challenge of implementing continuous processing on the FPGA platform itself, replacing traditional analogue electronics. The proposed system uses a novel technique of applying dithering to the DDS only when required, greatly reducing the generation of spurious frequencies during transmitting of the linearised chirp. This is the first known 77GHz FPGA to use this technique.