FPGA_accelerator_for_ORB_feature_extraction_SARTECO.pdf

An embedded feature detection and description system based on ORB- IPs. Using the Xilinx HLS tool, the exploited mode was developed from software code. Then, utilizing Customized Overlay and Jupyter Notebook, Co-design is done on the PYNQ Z2 based on Axis connection and BRAMs. Experiments show that our proposed prototype is effective regarding run-time execution and hardware cost. The system throughput is significantly higher than traditional FPGA-based feature detection and description systems.